System controller interfacing a main memory and a modem and tran

Details System controller interfacing a main memory and a modem and tran System controller interfacing a main memory and a modem and tran

1998-03-31

2000-06-20

Lee, Thomas C.

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral adapting

710 52, 710 71, 710 74, 710129, 455557, G06F 1310, G06F 1338

Patent

active

060789735

ABSTRACT:
Circuitry is described for interfacing a software-based modem in a computer system. Memory/modem interface circuitry is integrated within a system controller coupling a main memory with a microprocessor. A dedicated region of the main memory is configured as separate transmit data and received data buffer regions. Buffer address registers included within the system controller store values pointing to address locations within the buffer regions of the memory for next data in and next data out. The values programmed in these registers are incremented responsive to associated data transfers in/out of the buffer regions, and the transmit data and received data buffer regions function as FIFOs. The frequency and duration of processor utilization imposed by software-based modems is significantly reduced, due to FIFO operations functioning at main memory access speed.

REFERENCES:
patent: 5450530 (1995-09-01), Snyder et al.
patent: 5537654 (1996-07-01), Bedingfield et al.
patent: 5572148 (1996-11-01), Lytle et al.
patent: 5754590 (1998-05-01), Bays et al.
patent: 5797028 (1998-08-01), Gulick et al.
patent: 5802483 (1998-09-01), Morris
patent: 5822553 (1998-10-01), Gifford et al.

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