Apparatus and method for providing a static mode for dynamic log

Details Apparatus and method for providing a static mode for dynamic log Apparatus and method for providing a static mode for dynamic log

1998-04-06

2000-06-20

Tokar, Michael

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

326 96, H03K 1900

Patent

active

060781939

ABSTRACT:
A system and method for providing a static mode for logic circuits with dynamic latches. The invention provides a reliable static mode for testing of the logic circuit, prevents "through current" power consumption when clocks to the logic circuit are stopped, and allows the circuit to be powered down when idle. The system includes a circuit for forcing clock phases to an active state, a circuit for breaking feedback paths within the logic circuit, and an optional clock loss detector for detecting clock inactivity and automatically initiating the static mode.

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patent: 5712826 (1998-01-01), Wong et al.
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