Multi-layer circuit having a via matrix interlayer connection

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

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Details

257 70, 257758, 257693, H01L 2312, H05K 100, H05K 342

Patent

active

057539766

ABSTRACT:
An interlayer connection for electrically connecting first and second conductive elements and reducing interlayer registration requirements is disclosed. The interlayer connection includes a first layer including a first electrically conductive element, a second layer including a second electrically conductive element, and a third layer disposed between the first layer and the second layer. The third layer includes an electrically insulative portion having a matrix of immediately adjacent vias therethrough. A selected plurality of immediately adjacent vias within the matrix are disposed between the first and the second electrically conductive elements and contain electrically conductive material forming a conductive path between the first and the second electrically conductive elements.

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Glenn Gengel, "Quick Turn Manufacturing of Interconnect Systems Using Predrilled and Plated Via Arrays", 14 pages.

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