Static information storage and retrieval – Read/write circuit – Accelerating charge or discharge
Patent
1991-05-10
1993-11-23
Heyman, John S.
Static information storage and retrieval
Read/write circuit
Accelerating charge or discharge
365185, 365900, G11C 1140
Patent
active
052650596
ABSTRACT:
Circuitry for discharging a drain of a cell of a non-volatile semiconductor memory is described. A discharge transistor is coupled between (1) the drain of the cell and (2) ground for selectably (a) providing a discharge paths to ground for the drain of the cell when the discharge transistor is enabled and (b) not providing a discharge path to ground for the drain of the cell when the discharge transistor is not enabled. Circuitry is coupled to the discharge transistor for enabling the discharge transistor for a duration that both begins and ends (1) after a first operation is performed with respect to the cell and (2) before a verify operation is performed with respect to the cell.
REFERENCES:
patent: 4301535 (1981-11-01), McKenny et al.
patent: 4677590 (1987-06-01), Arakawa
patent: 4720816 (1988-01-01), Matsuoka et al.
patent: 4905197 (1990-02-01), Urai
patent: 4937787 (1990-06-01), Kobatake
patent: 5065364 (1991-11-01), Atwood et al.
"Intel Corporation Memory Components Handbook", pp. 5-47 through 5-69 and pp. 5-115 through 5-118 (Intel 1989).
Fandrich Mickey L.
Jungroth Owen W.
Wells Steven E.
Heyman John S.
Intel Corporation
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