Static information storage and retrieval – Systems using particular element – Flip-flop
Patent
1985-05-24
1987-06-09
Moffitt, James W.
Static information storage and retrieval
Systems using particular element
Flip-flop
365190, 357 92, 307459, 307477, G11C 700
Patent
active
046725792
ABSTRACT:
Semiconductor integrated word organized store comprising a two-dimensional array of bistable storage cells linked by orthogonal word lines and pairs of bit lines. Each cell consists of two cross-coupled merged transistor logic (MTL) gates having a structure providing a vertical inverting base transistor and two complementary lateral injector transistors. A cell is driven by read/write logic pulses applied to the word lines and bit lines only. To read the contents of a word from the array, read logic drives the read injectors of the cells constituting the word at a high injector current level and the read injectors of all other cells at a low injector current level. To select a word for writing, the read logic drives the read injectors of the cells comprising the word at a low injector current level and all other cells at a high injector current level. The contents of the selected word may then be changed by differentially driving the cell write injectors over the bit lines. Output multiplexing of cells storing corresponding bit positions in the words is achieved simply by connecting the cell outputs together (dot ANDing). Logical output discrimination and interfacing is achieved by comparing the multiplexed output current with a threshold current. If the output current is less than the threshold current, the cell is storing a logical ONE. If the output current is greater than the threshold current, the cell is storing a logical ZERO.
REFERENCES:
patent: 3986178 (1976-10-01), McElroy
patent: 4122542 (1978-10-01), Camerik et al.
patent: 4203051 (1980-05-01), Hallett et al.
patent: 4366554 (1982-12-01), Aoki et al.
patent: 4470061 (1984-09-01), Nakai
IEEE Journal of Solid State Circuits, vol. SC-7, No. 5, _Oct. 1972, pp. 340ff-346ff, Berger et al., "Merged-Transistor _Logic (MTL)--A Low-Cost Bipolar Logic Concept".
Thomas Vincent P.
West Roderick M. P.
Woodley John P.
Gossage Glenn A.
International Business Machines - Corporation
Limanek Stephen J.
Moffitt James W.
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