Semiconductor memory device for selecting and deselecting blocks

Details Semiconductor memory device for selecting and deselecting blocks Semiconductor memory device for selecting and deselecting blocks

1993-06-22

1995-09-19

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Bad bit

365185, 365218, 36523003, G11C 1140

Patent

active

054522510

ABSTRACT:
A semiconductor memory device has 2.sup.n word lines, a plurality of bit lines, a plurality of nonvolatile memory cells disposed at each intersection of the word lines and the bit lines, a write circuit for writing data to a memory cell located at an intersection of selected ones of the word lines and the bit lines, and a sense amplifier for reading data out of the memory cells. Further, the semiconductor memory device comprises a first unit for simultaneously selecting a block of 2.sup.m (n>m) word lines among the 2.sup.n word lines, and a second unit for not selecting a block of 2.sup.k (m>k) word lines among the 2.sup.m word lines. The second unit does not select the block of 2.sup.k word lines, and selects a block of 2.sup.k word lines prepared outside the 2.sup.n word lines when any one of the 2.sup.k word lines among the 2.sup.m word lines is defective. Consequently, redundant word lines are effectively employed, write and verify operations are stable, and thereby the yield and performance of the semiconductor memory device are improved.

REFERENCES:
patent: 5233559 (1993-08-01), Brennan, Jr.
patent: 5297148 (1994-03-01), Harari et al.

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