Semiconductor integrated circuit and method of manufacturing sam

Details Semiconductor integrated circuit and method of manufacturing sam Semiconductor integrated circuit and method of manufacturing sam

1989-09-12

1992-07-07

James, Andrew J.

357 55, 357 71, 357 236, H01L 2968, H01L 2934, H01L 2906, H01L 2348

Patent

active

051287447

ABSTRACT:
In a semiconductor integrated circuit device having a fine multilayer interconnection structure, a wiring material such as tungsten is formed on a predetermined part of the interior of a wiring layer-forming groove formed in a flat inter-layer insulating film by selective deposition. The flat inter-layer insulating film has a laminate structure of two or more insulating films different in etching speed, and a (first) insulating film, underlying a (second) insulating film in which the wiring layer-forming groove of the inter-layer insulating film is formed, serves as an etching stopper to make the depth of the wiring layer-forming groove constant when forming the groove from etching. Consequently, the depth of the wiring layer-forming groove can be defined accurately by the thickness of a (second) insulating film formed by deposition, and the film thickness between wiring layers can be accurately defined by the thickness of an insulating film formed by deposition.

REFERENCES:
patent: 4283439 (1981-08-01), Higashinakagawa et al.
patent: 4398335 (1983-08-01), Lehrer
patent: 4732801 (1988-03-01), Joshi
patent: 4800177 (1989-02-01), Nakamae
patent: 4816895 (1989-03-01), Kikkawa
patent: 4847674 (1989-07-01), Sliwa
patent: 4851295 (1989-07-01), Brors
patent: 4907066 (1990-03-01), Thomas et al.
Oberai, "Single Masking for Emitter-Base Diffusion," IBM Tech. Discl. Bulletin, p. 387, Jul. 1971.
Arnett, "Three-Dimensional Dual Insulator Memory", IBM Tech. Discl. Bulletin, p. 3517-3518, Apr. 1974.
Bilous, "Multilevel Wiring for Integrated Circuits," IBM Tech. Discl. Bulletin, pp. 429-430, Jul. 1970.

Affiliated with

Also associated with

Rating

Semiconductor integrated circuit and method of manufacturing sam does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor integrated circuit and method of manufacturing sam, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor integrated circuit and method of manufacturing sam will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1833237