Full-featured EEPROM

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

365185, 257408, H01L 2968, H01L 2910, G11C 1134

Patent

active

052162680

ABSTRACT:
Disclosed is a byte-erasable EEPROM memory cell which utilizes a five volt external source and a voltage multiplier circuit to program and erase a floating gate by means of electron tunneling. To prevent collapse of the voltage multiplier circuit a lightly doped drain region is incorporated preventing gate modulated junction breakdown, thereby preventing collapse of the voltage multiplier circuit. In addition, current flow through the channel separating a source region and the lightly doped drain region is controlled by a portion of a control gate and the floating gate, thereby allowing a higher erased cell threshold voltage. Also disclosed is a process for forming the lightly doped drain region by using the control gate as an effective sidewall spacer.

REFERENCES:
patent: 5079603 (1992-01-01), Komori et al.
patent: 5101250 (1992-03-01), Arima et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Full-featured EEPROM does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Full-featured EEPROM, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Full-featured EEPROM will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1816828

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.