Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-01-07
1999-09-07
Palys, Joseph E.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711162, G06F 1120
Patent
active
059499702
ABSTRACT:
A data processing system including a first and second host, a first and second outboard file cache connected to the first host, and a first and second secondary storage device connected to the first host. The system operation includes the first host reading file data from the first or second secondary storage device after the data is cached on both the first and second outboard file caches. File data is updated by writing to both first and second outboard file caches. File data is destaged by writing data from the first outboard file cache only, to first and second secondary storage devices. Failure of a single outboard file cache is handled by the first host not reading and writing to the failed outboard file cache. Site-wide failure of first host, first outboard file cache, and first secondary storage device is handled by establishing communication from second host to both second outboard file cache and second secondary storage device and resuming processing.
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Cooper Thomas P.
Heideman Michael J.
Konrad Dennis R.
Sipple Ralph E.
Elisca Pierre E.
Johnson Charles A.
Palys Joseph E.
Starr Mark T.
Unisys Corporation
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