Memory array with larger memory capacitors at row ends

Static information storage and retrieval – Systems using particular element – Capacitors

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307238, G11C 1124

Patent

active

041187946

ABSTRACT:
A memory cell of a dynamic storage device is composed of a MOSFET and a capacitor. On a single semiconductor substrate, a plurality of such memory cells are regularly arranged so as to form a plurality of columns, with the result that they constitute a memory cell array or a memory cell mat. The capacitor for the memory cell is made up of a semiconductor region of the type which possesses a conductivity opposite to that of the semiconductor substrate, and a conductor film which is formed of polycrystalline silicon or the like on the semiconductor region through a comparatively thin insulating film. The areas of the capacitors in the memory cell column situated at an end portion of the memory cell mat are made larger than those of the capacitors of the memory cells at an inner or central portion of the memory cell mat. The memory cells at the end portion of the memory cell mat come to have information holding times equivalent to those of the memory cells at the central portion of the memory cell mat.

REFERENCES:
patent: 3760381 (1973-09-01), Yao
patent: 4038646 (1977-07-01), Mehta et al.

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