Method of planarization of an intermetal dielectric layer using

Details Method of planarization of an intermetal dielectric layer using Method of planarization of an intermetal dielectric layer using

1996-05-20

1999-09-07

Codd, Bernard

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

438692, 438 13, 438 17, 438761, 438763, 438778, 438782, 438788, 216 86, 216 89, H01L 21306

Patent

active

059487003

ABSTRACT:
A method of planarizing integrated circuit wafers using chemical mechanical polishing with an automatic end point and without using an etchback step. An electrode pattern is formed in a layer of soft metal, such as Al/Cu/Si, capped with a layer of hard metal such as tungsten. A layer of first oxide, a layer of spin on glass, and a layer of second oxide are formed over the electrode pattern. The layer of first oxide, the layer of spin on glass, and the layer of second oxide are then planarized using chemical mechanical polishing. The hard metal cap on the electrode pattern can not be removed by the chemical mechanical polishing and forms an automatic end point. The electric current powering the motor driving the chemical mechanical polishing changes when the hard metal cap is reached and this change can be used to detect the end point.

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