Semiconductor device having a buried channel transistor

Details Semiconductor device having a buried channel transistor Semiconductor device having a buried channel transistor

1995-10-24

1996-07-16

Loke, Steven H.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257391, 257403, 257903, H01L 2976, H01L 2994, H01L 3162, H01L 2711

Patent

active

055369626

ABSTRACT:
A semiconductor device (10) includes first and second electrically coupled MOS transistors (16, 28) in which the current gain of the second MOS transistor (16) is greater than the current gain of the first MOS transistor (28). Higher carrier mobility is obtained in the second MOS transistor (16) relative to the first MOS transistor (28) by fabrication of the second MOS transistor (16) as a buried channel device. The first MOS transistor (28) includes a gate electrode (44) of the second conductivity type separated from a channel region (46) of the first conductivity type by a gate electric layer (48). The second MOS transistor (16) includes a gate electrode (40) of a first conductivity type overlying a substrate (11) also of the first conductivity type. A channel surface layer (60) of a second conductivity type resides in the substrate (11 ) and is separated from the gate electrode (40) by a gate dielectric layer (58). The second MOS transistor (16) is electrically coupled to the first MOS transistor (28) by a doped region (52) of the second conductivity type.

REFERENCES:
patent: 5055904 (1991-10-01), Minami et al.
Parrillo et al., "A Fine-Line CMOS Technology that uses P.sup.+ -polysilicon/slicide gates for NMOS and PMOS devices", AT&T Bell Laboratories, 1984 IEDM, pp. 418-422.
Nakahara et al., "Relief of hot carrier constraint on submicron CMOS Devices by use of a buried channel structure", Semiconductor Device Engineering Lab., Toshiba Corp., 1985 IEDM, pp. 238-241.

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