Method of photo alignment for shallow trench isolation with chem

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature

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438424, H01L 2176

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active

060806354

ABSTRACT:
A method of preserving alignment marks in integrated circuit substrates using shallow trench isolation after planarization using chemical mechanical polishing. A layer of silicon nitride is formed on the substrate and openings defining alignment trenches and isolation trenches are etched in the silicon nitride layer. Alignment trenches are formed in alignment regions of the substrate and isolation trenches are formed in the active region of the substrate during the same process step using the openings in the silicon nitride layer as a mask. A layer of dielectric is then deposited on the substrate filling the alignment trenches and the isolation trenches. The dielectric is then etched away from the alignment trenches and the substrate is planarized. After a layer of conducting material is deposited on the wafer the alignment trenches are preserved.

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