Tungsten stud process for stacked via applications

Fishing – trapping – and vermin destroying

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

437195, 437228, H01L 21283, H01L 21302

Patent

active

055916732

ABSTRACT:
A tungsten stud, stacked via process, has been developed, featuring smooth planar topographies at all metal levels. The desirable topography is obtained by allowing the tungsten stud to reside at the same level, or slightly above the level, of the top surface of the via hole insulator. This is achieved via an insulator etch back procedure, performed after metal stud formation.

REFERENCES:
patent: 4520041 (1985-05-01), Aoyama et al.
patent: 4592802 (1986-06-01), Deleonibus et al.
patent: 5035768 (1991-07-01), Mu et al.
patent: 5210053 (1993-05-01), Yamagata
patent: 5286675 (1994-02-01), Chen et al.
Higelin, G., et al., "A Contact Filling Process With CVD-Tungsten . . . " V-MIC Conf., IEEE, Jun. 9-10, 1986, pp. 443-449.
Bollinger, C. A., et al., "An Advanced Four Level . . . ", V-MIC Conf., IEEE, Jun. 12-13, 1990, pp. 21-27.
Wolf, S., et al., Silicon Processing, vol. 1, 1986, Lattice Press, pp. 168-173, 348-353, 547-551.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Tungsten stud process for stacked via applications does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Tungsten stud process for stacked via applications, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Tungsten stud process for stacked via applications will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1763885

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.