High-frequency semiconductor wafer processing method using a neg

Details High-frequency semiconductor wafer processing method using a neg High-frequency semiconductor wafer processing method using a neg

Filed on

1991-10-11

Date issued

1993-06-29

Examiner

Hearn, Brian E.

Patent Class

Fishing, trapping, and vermin destroying

Other Related Categories

437228, 427534, 427574, 156643, 156646, 148DIG51, H01L 2100, H01L 2102, H01L 2131, H01L 21205

Type

Patent

Status

active

Patent number

052234576

Description

ABSTRACT:
A plasma process apparatus capable of operation significantly above 13.56 MHz can produce reduced self-bias voltage of the powered electrode to enable softer processes that do not damage thin layers that are increasingly becoming common in high speed and high density integrated circuits. A nonconventional match network is used to enable elimination of reflections at these higher frequencies. Automatic control of match network components enables the rf frequency to be adjusted to ignite the plasma and then to operate at a variable frequency selected to minimize process time without significant damage to the integrated circuit.

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Coburn, J., Positive-Ion Bombardment of substrates in RF Diode Glow Discharge Sputtering, J. Appl. Phys., 1972, vol. 43, No. 12, pp. 4965-4971.
Sze, S., VLSI Technology, pp. 107-108, McGraw-Hill, 1983.
Nakoto Goto; Bias ECR Device; 6 Sep. 1990; vol. 14, No. 412, Patent Abstracts of Japan.
Professor Tadahiro Ohmi, "From Alchemy to Science: Technological Challenges" from a handout given at a talk on Sep. 1, 1989.

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