Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Patent
1997-05-16
1998-06-16
Jackson, Jerome
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
365226, 365227, 327534, 257 48, H01L 27115, G11C 1606
Patent
active
057681953
ABSTRACT:
A semiconductor memory device according to he present invention comprises a first conductivity-type semiconductor substrate in which a second conductivity-type well is formed, a memory cell array composed of a plurality of memory cells arranged in a matrix in the second conductivity-type well, and a substrate voltage control circuit selectively outputting an output voltage to the substrate according to an external input signal.
REFERENCES:
patent: 4233526 (1980-11-01), Kurogi et al.
patent: 4959812 (1990-09-01), Momodomi et al.
patent: 5008856 (1991-04-01), Iwahashi
patent: 5148394 (1992-09-01), Iwahashi
patent: 5376840 (1994-12-01), Nakayama
Iwata Yoshihisa
Kirisawa Ryouhei
Momodomi Masaki
Nakamura Hiroshi
Jackson Jerome
Kabushiki Kaisha Toshiba
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