Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1995-06-07
1997-03-18
Saadat, Mahshid D.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257750, 257758, H01L 2976, H01L 2994, H01L 31062, H01L 31113
Patent
active
056125577
ABSTRACT:
A semiconductor device includes a substrate, a first insulating film carried on the substrate, a first conductor layer having sides and carried on the first insulting film, and an interlayer insulating film overlying the first conductor layer and the first insulating film. The interlayer insulating film includes a top portion which overlies the first conductor layer and a pair of sidewall portions which overlie the first insulating film and are adjacent to and in contact with the sides of the first conductor layer. The semiconductor also includes a second conductor layer which extends from overlying part of the top portion of the interlayer insulating film to and in contact with an exposed portion of the substrate and adjacent the first insulating film wherein a portion of the second conductor layer is in contact with a thinned portion of the interlayer insulating film.
REFERENCES:
patent: 4128670 (1978-12-01), Gaensslen
patent: 4301518 (1981-11-01), Klaas
patent: 4494301 (1985-01-01), Faraone
patent: 4532534 (1985-07-01), Ford et al.
patent: 4561170 (1985-12-01), Doering et al.
patent: 4624863 (1986-11-01), Vora
patent: 4654680 (1987-03-01), Yamazaki
patent: 4663645 (1987-05-01), Komori et al.
patent: 4743564 (1988-05-01), Sato et al.
patent: 4782033 (1988-11-01), Gierisch et al.
patent: 4807002 (1989-02-01), Donzelli
patent: 4808544 (1989-02-01), Matsui
patent: 4823172 (1989-04-01), Mihara
patent: 4845544 (1989-07-01), Shimizu
patent: 4855801 (1989-08-01), Kuesters
patent: 4862233 (1989-08-01), Matsushita et al.
patent: 4881107 (1989-11-01), Matsushita
patent: 4892841 (1990-01-01), Iwase et al.
patent: 4907046 (1990-03-01), Ohji et al.
patent: 4931996 (1990-06-01), Yasuda
patent: 4997790 (1991-03-01), Woo et al.
patent: 5075762 (1991-12-01), Kondo et al.
patent: 5191402 (1993-03-01), Kondo et al.
patent: 5227319 (1993-07-01), Ogura et al.
patent: 5270240 (1993-12-01), Lee
"An 80ns 1Mb ROM" by Fujio Masuoka et al., 1984 IEEE International Solid-State Circuits Conference, pp. 146, 147 and 329.
"4M Bit Mask ROM And The Application Therefor" by Shoichi-Tsujita, Electronic Parts and Materials, published Jan. 1, 1986, pp. 104-108.
"Use of the Polysilicon Gate Layer for Local Interconnect in a CMOS Technology/Incorporating LDD Structures" by M. H. El-Diwany et al., IEEE Transactions on Electron Devices, vol. 35, No. 9, Sep. 1988, pp. 1556-1558 .
Kondo Toshihiko
Tanaka Kazuo
Yasuda Hirofumi
Clark S. V.
Saadat Mahshid D.
Seiko Epson Corporation
LandOfFree
Semiconductor device having an inter-layer insulating film dispo does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device having an inter-layer insulating film dispo, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having an inter-layer insulating film dispo will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1708036