Deep trench etch on bonded silicon wafer

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

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438719, H01L 2100

Patent

active

059142804

ABSTRACT:
A quick, deep, clean two step trench process for an SOI/bonded wafer substrate 100 is disclosed. A first isotropic plasma etch using SF6 is made through an opening 40 in the photoresist layer on device layer 16. A second anisotropic plasma etch using SF6 and Cl2 stops on the isolation/bond oxide layer 14. The bottom of the trench 60 is overetched to form cavities 50 on the isolation/bond oxide layer 14 without removing a substantial portion of that layer.

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