Dynamic random access memory allowing determination of a read/wr

Details Dynamic random access memory allowing determination of a read/wr Dynamic random access memory allowing determination of a read/wr

1992-01-30

1993-07-06

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

365 63, 36518905, G11C 700

Patent

active

052260089

ABSTRACT:
There is disclosed a DRAM having a 16 bit configuration which can be used for either a 2CAS/1WE type or a 1CAS/2WE type. The type of DRAM to be used is determined by whether there is a connection through a gold wire between a predetermined bonding pad and a lead for ground potential. Depending on the state of the connection of the bounding pad, conversion buffer converts externally applied control clock signals to internal control clock signals for either the 2CAS/1WE or the 1CAS/2WE. A clock generator not shown is operated in response to the converted internal control clock signals. The type of DRAM to be used is determined by whether there is a connection through a gold wire which is provided at the final step in a manufacturing process, so that the manufacturing processes are unified and therefore the type of DRAM to be used can be altered quickly depending on a drastically changing demand. In addition, efficiency in manufacturing a DRAM is enhanced.

REFERENCES:
patent: 4956811 (1990-09-01), Kajigaya et al.
patent: 5018101 (1991-05-01), Kajigaya et al.

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