Reconfigurable computing architecture for providing pipelined da

Details Reconfigurable computing architecture for providing pipelined da Reconfigurable computing architecture for providing pipelined da

1997-07-18

2000-02-08

Sheikh, Ayaz R.

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

710131, 712 10, 712 11, 712 15, 712 17, G06F 1314

Patent

active

060237422

ABSTRACT:
A configurable computing architecture (10) has its functionality controlled by a combination of static and dynamic control, wherein the configuration is referred to as static control and instructions are referred to as dynamic control. A reconfigurable data path (12) has a plurality of elements including functional units (32, 36), registers (30), and memories (34) whose interconnection and functionality is determined by a combination of static and dynamic control. These elements are connected together, using the static configuration, into a pipelined data path that performs a computation of interest. The dynamic control signals (21) are suitably used to change the operation of a functional unit and the routing of signals between functional units. The static control signals (23) are provided each by a static memory cell (62) that is written by a host (13). The controller (14) generates control instructions (16) that are interpreted by a control path (18) that computes the dynamic control signals. The control path is configured statically for a given application to perform the appropriate interpretation of the instructions generated by the controller. By using a combination of static and dynamic control information, the amount of dynamic control used to achieve flexible operation is significantly reduced.

REFERENCES:
patent: 4493048 (1985-01-01), Kung et al.
patent: 4777614 (1988-10-01), Ward
patent: 4823299 (1989-04-01), Chang et al.
patent: 5148385 (1992-09-01), Frazier
patent: 5274832 (1993-12-01), Khan
patent: 5588152 (1996-12-01), Dapp et al.
patent: 5600845 (1997-02-01), Gilson
patent: 5752035 (1998-05-01), Trimberger
patent: 5784636 (1998-07-01), Rupp
patent: 5794062 (1998-08-01), Baxter
Hartenstein, R. W. et al., "A Datapath Synthesis System for the Reconfigurable Datapath Architecture," ASP-DAC '95 (Aug. Sep. 1995).
Hartenstein, R. W. et al., "A Reconfigurable Data-Driven ALU for Xputers," FCCM '94 (Apr. 1994).

Affiliated with

Also associated with

Rating

Reconfigurable computing architecture for providing pipelined da does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Reconfigurable computing architecture for providing pipelined da, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Reconfigurable computing architecture for providing pipelined da will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1688924