Static information storage and retrieval – Read/write circuit – Serial read/write
Patent
1995-01-03
1996-02-27
Nguyen, Tan T.
Static information storage and retrieval
Read/write circuit
Serial read/write
36518907, 365236, 36518902, G11C 700
Patent
active
054954517
ABSTRACT:
An apparatus for detecting data input/output states of a plurality of FIFO memories, comprising a control signal generator for logically combining a load clock signal, a read clock signal, a write clock signal and a reset signal to generate a clock signal and a mode signal, a clock counting circuit for performing a counting operation for the read clock signal and the write clock signal in response to the clock signal and the mode signal from the control signal generator to generate a count signal, a fullness level value storage unit for storing a plurality of fullness level values, a multiplexer for selecting one of the fullness level values from the fullness level value storage unit in response to a select signal, a signal comparator for comparing an output signal from the multiplexer with the count signal from the clock counting circuit to discriminate whether it is the same as the count signal, a demultiplexer for generating a plurality of status signals in response to an output signal from the signal comparator and the select signal, the status signals being indicative of a fullness level value regarding the number of data currently stored in the corresponding FIFO memory, and a flag generator for generating a plurality of flag signals in response to the status signals from the demultiplexer.
REFERENCES:
patent: 5206817 (1993-04-01), McClure
patent: 5228002 (1993-07-01), Huang
patent: 5375092 (1994-12-01), Taniguchi et al.
patent: 5426612 (1995-06-01), Ichige et al.
Goldstar Electron Co. Ltd.
Nguyen Tan T.
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