Circuit for burn-in operation on a wafer of memory devices

Details Circuit for burn-in operation on a wafer of memory devices Circuit for burn-in operation on a wafer of memory devices

1998-02-27

1999-11-30

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Testing

324765, G11C 2900

Patent

active

059954280

ABSTRACT:
A circuit is provided for use on a wafer formed with a plurality of dice on each of which a memory device, such as a DRAM (dynamic random access memory) device to perform a burn-in operation on the memory device so as to test the reliability thereof. By this circuit, a plurality of pads are formed in the scribe lines that are used as reference marks in the cutting apart of the dice. These pads are used to transfer an externally generated burn-in enable signal and a DC bias voltage to each memory device. Since the pads for burn-in wiring are formed in the scribe lines, they will not take additional space on the dice where each memory device is formed. The burn-in operation is more convenient, quick, and cost-effective to implement.

REFERENCES:
patent: 5557573 (1996-09-01), McClure
patent: 5619462 (1997-04-01), McClure
patent: 5790465 (1998-08-01), Roh et al.
patent: 5808947 (1998-09-01), McClure
patent: 5852581 (1998-12-01), Beffa et al.

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