Method and apparatus for limiting bitline current

Details Method and apparatus for limiting bitline current Method and apparatus for limiting bitline current

1998-02-27

1999-11-30

Nelms, David

Static information storage and retrieval

Read/write circuit

Bad bit

36523008, 36518509, 36518521, G11C 700

Patent

active

059954230

ABSTRACT:
A flash memory integrated circuit includes wordlines, bitlines, an array of floating gate transistor memory cells, and current limiters. Each floating transistor memory cell is coupled to one of the bitlines and one of the wordlines. The current limiters operate when the floating gate transistor memory cells are programmed to limit an amount of current that a defective transistor memory cell draws through the bitline coupled to the defective transistor memory cell.

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patent: 5398203 (1995-03-01), Prickett, Jr.
patent: 5499211 (1996-03-01), Kirihata et al.
patent: 5568435 (1996-10-01), Marr
patent: 5581504 (1996-12-01), Chang

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