Field programmable gate array transferring signals at high speed

Details Field programmable gate array transferring signals at high speed Field programmable gate array transferring signals at high speed

1995-05-25

1996-07-30

Westin, Edward P.

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 38, 326 44, H03K 19173

Patent

active

055415296

ABSTRACT:
A field programmable gate array includes a logic blocks, switching elements for establishing a signal propagation path, and memory cells provided corresponding to the switching elements for storing data determining on and off states of corresponding switching elements. In this gate array, a supply voltage fed to a power input terminal is transmitted to power supply nodes of logic circuit blocks. A booster circuit boosts the supply voltage fed to the power input terminal and feeds the boosted voltage to power supply nodes of memory cells for programming a signal propagation path. A high-level signal potential of each memory cell is fed to the gate of an n-channel MOS transistor which functions as the switching element. The switching elements are disposed on signal lines and serve to interconnect the signal lines selectively to establish a signal propagation path. The current supply capability of the MOS transistors is enhanced to realize faster propagation of the signal, and any harmful influence of the threshold voltage exerted on the signal amplitude loss can be suppressed by a rise of the gate potential in each MOS transistor.

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Xilinx The Programmable Gate Array Data Book, 1992 month available, pp. 2-26, 2-27, 2-62, 2-63, 2-66, 2-67, 2-70, 2-72.
A User Programmable Reconfigurable Logic Array, William S. Carter et al, IEEE 1986 month available Custom Integrated Circuits Conference, pp. 233-235.
Optimal Configuration of Sense Circuit for dynamic MOS Memory, Jun-ichi INOUE et al, Musashino Electrical Communication Laboratory, N.T.T., 1980 month available, vol. SSD80-44, pp. 69-76.

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