Patent
1996-01-26
1998-09-22
Harvey, Jack B.
395306, G06F 1300
Patent
active
058127984
ABSTRACT:
A data processor (10) flexibly interfaces with both a variety of memory devices and external peripheral devices. A control register (94) is provided for dynamically controlling a data bus configuration of the data processor. A set of bits (DSZ) in the control register (94) provides configuration control which indicates a width of data communicated with the data processor and a configuration of the integrated circuit terminals (124) by which the information is communicated.
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"MC68020 32-Bit Microprocessor User's Manual Fourth Edition" published by Motorola, Inc. in 1990, pp. 7-6 through 7-13 and 7-22 through 7-23.
Chin Sek Li
Moyer William C.
Harvey Jack B.
Motorola Inc.
Wiley David A.
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