Differential pair input buffer circuit with a variable current s

Details Differential pair input buffer circuit with a variable current s Differential pair input buffer circuit with a variable current s

1996-02-27

1998-04-07

Santamauro, Jon

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

326 34, 326 83, 327 56, 327 89, 330253, H03K 190948, H03F 345

Patent

active

057368716

ABSTRACT:
In an input buffer circuit for use in a semiconductor integrated circuit, comprising a differential pair formed of a pair of MOS transistors and receiving a reference voltage and an input signal supplied from an external, a first constant current source MOS transistor connected to the differential pair, and a load circuit connected to the differential pair, a second constant current source MOS transistor is connected in parallel to the first constant current source MOS transistor. A gate voltage of the second constant current source MOS transistor is controlled by a reference voltage convening circuit which receives the reference voltage. When the reference voltage elevates, the reference voltage converting circuit elevates the gate voltage of the second constant current source MOS transistor, so as to reduce an ON resistance of the second constant current source MOS transistor, thereby changing a source potential of the pair of MOS transistors of the differential pair in the same direction as that of the change of the reference voltage.

REFERENCES:
patent: 5175451 (1992-12-01), Ihara
patent: 5317214 (1994-05-01), Lewis
patent: 5339045 (1994-08-01), Rusznyak
patent: 5343086 (1994-08-01), Fung et al.
patent: 5451898 (1995-09-01), Johnson

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