Line memory

Details Line memory Line memory

1997-07-17

1998-10-27

Hoang, Huan

Static information storage and retrieval

Read/write circuit

Serial read/write

365219, 36518901, 36518904, G11C 700

Patent

active

058286187

ABSTRACT:
The function of a line memory can be achieved only with one bit line. As word lines WL.sub.j-1 and WL.sub.j are activated in this order, data has already been read out before new data is written into memory cells MC.sub.j-1,i and MC.sub.j,1. More specifically, a writing process is performed on the same memory cell after a readout process, achieving delay operation as taught in a conventional technique. Further, as both operations of a tristate buffer 11 and a D latch 13 are controlled in accordance with the readout and the writing processes, one bit line serves both as a write bit line and a read bit line.

REFERENCES:
patent: 5508967 (1996-04-01), Karino
patent: 5596540 (1997-01-01), Diem et al.
patent: 5646903 (1997-07-01), Johnson
M. Kimura et al., "A 3V, 100 MHZ, 35mW, Dynamic Line Memory Macro Cell for HDTV Applications," Reprinted from Proceedings of the IEEE 1992 Custom Integrated Circuits Conference, Boston, MA, May 3-6, 1992, pp. 7.4.1-7.4.4 .

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