Memory integrated circuits having on-chip topology logic driver,

Details Memory integrated circuits having on-chip topology logic driver, Memory integrated circuits having on-chip topology logic driver,

1994-09-22

1996-01-30

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Testing

371 212, 364491, G11C 700, G11C 2900

Patent

active

054885833

ABSTRACT:
A memory integrated circuit chip of a predefined circuit topology has an on-chip topology logic driver. The topology logic driver selectively inverts data being written to and read from addressed memory cells in the memory IC based upon location of the addressed memory cells in the circuit topology of the memory array. The topology logic driver is preferably a logic circuit that embodies a boolean function defining the circuit topology. A method for testing and producing such memory ICs is also described.

REFERENCES:
patent: 5208778 (1993-05-01), Kumanoya et al.
patent: 5263029 (1993-11-01), Wicklund, Jr.
Kwon, Oh-Hyun et al., "A Review on Critical Technology for a Manufacturable 64Mb DRAM", Samsung Electronics Co., pp. 41.46. (Publication Date Unavailable).
Yoshihara, Tsutomu et al., "A Twisted Bit Line Technique for Multi-Mb DRAMs", IEEE International Solid-State Circuits Conf., 1988 pp. 238-239.

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