Semiconductor memory device having improved connecting structure

Details Semiconductor memory device having improved connecting structure Semiconductor memory device having improved connecting structure

1988-03-25

1990-08-28

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Capacitors

365185, 365 63, 357 236, 357 55, G11C 1140, H01L 2978

Patent

active

049531255

ABSTRACT:
A semiconductor memory device includes a first trench serving as a memory cell formed in a p type semiconductor substrate, a first n type semiconductor region formed adjacent to the trench region and on the major surface of the semiconductor substrate, a conductive layer serving as an electron active region formed adjacent to the first n type region and on the major surface of the semiconductor substrate, a second n type semiconductor region formed adjacent to the electron active region and on the major surface of the semiconductor substrate, a second trench formed adjacent to the second n type semiconductor region in the major surface of the semiconductor substrate which is shallower than the first trench, an interconnection layer serving as a bit line formed in a self-aligning manner in the sidewall portion of the second trench which is shallower than the first trench and a gate electrode serving as a word line formed in the upper portion of the conductive layer through an oxide film.

REFERENCES:
patent: 4792834 (1988-12-01), Uchida
patent: 4811067 (1989-05-01), Fitzgerald et al.
patent: 4814840 (1989-03-01), Kameda
patent: 4816884 (1989-05-01), Hwang et al.
patent: 4819052 (1989-04-01), Hutter
patent: 4819054 (1989-04-01), Kawaji et al.
IBM Tech. Discl. Bull. vol. 31, No. 4, Sep. 88, pp. 245-248, "Baried-Contact***Trench Isolation" by IBM Corp.
IBM Tech. Discl. Bull., vol. 31, No. 5, Oct. 88, pp. 155-156, "Nested Two Trench P+ Contact".
IEDM 84: "An Isolation-Merged Vertical Capacitor Cell For Large Capacity DRAM", by S. Nakajima et al., 9.4, 1984 pp. 240-243.

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