RAM with capability for rapid clearing of data from memory by si

Details RAM with capability for rapid clearing of data from memory by si RAM with capability for rapid clearing of data from memory by si

1988-05-31

1989-12-26

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Erase

365 22, 365226, G11C 700, G11C 1140

Patent

active

048902632

ABSTRACT:
A Random Access Memory having a fast Clear operation includes a cell array (10) which has a plurality of memory cells arranged in rows and columns. Each of the rows is selected by word lines (12) and the data is output on column lines (14). Each of the word lines (12) is selected by a row decode circuit (20) or a Clear signal through OR gates (22). The Clear signal selects all of the word lines (12) such that each row in the cell array (10) is selected. The bit line associated with each column are pulled to ground through an N-channel transistor (36) and a bit line bar pulled high through a P-channel transistor (38). In addition, the V.sub.CC supply to the array (10) is decoupled from the memory cells by a P-channel transistor (40).

REFERENCES:
patent: 4575823 (1986-03-01), Fitzpatrick
patent: 4587629 (1986-05-01), Dill et al.

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