Low noise semiconductor memory

Static information storage and retrieval – Read/write circuit – Noise suppression

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365207, 365 63, G11C 700, G11C 702, G11C 11404

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active

049583255

ABSTRACT:
A highly integrated semiconductor memory, particularly, a low noise dynamic memory. As the density of integration of the dynamic memory increases, the distance between data lines decreases and a new type of noise, which has hitherto been thought little of, displays itself. To cope with this problem in the semiconductor memory comprising a plurality of pairs of data lines arranged in substantially parallel relationship with each other, respective pairs having substantially the same electric characteristics, connection means provided in association with the respective data line pairs, a plurality of word lines laid to extend perpendicularly to the data line pairs, at least one memory cell connected to at least one of intersections of the word lines with data lines of the pairs, and a plurality of sense amplifier means respectively connected to the data line pairs to differentially detect signal voltages appearing on each data line pair, the plural data line pairs have an alternate arrangement of a pair of data lines transposed at an even number of places and a pair of data lines transposed at an odd number of places, and the sense amplifier means is operative to change voltage on one of the data lines of a pair to a high-level voltage and voltage on the other of the data lines of the pair of a low-level voltage.

REFERENCES:
patent: 3305846 (1967-02-01), Amemiya
patent: 3942164 (1976-03-01), Dunn
IBM Technical Disclosure Bulletin; vol. 24, No. 9; Feb. 1982; pp. 4800-4801.

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