Patent
1991-06-06
1993-12-28
Shaw, Dale M.
395200, G06F 1336
Patent
active
052747697
ABSTRACT:
A system for multiplexed transfer of data between plural blocks interconnected by a two-way data bus of a predetermined number of bus lines provides for simultaneous and parallel transfer over the plural bus lines of plural data bits, up to the same, maximum predetermined number of the bus lines. Each parallel data bit transfer is selectively controllable with respect both to the number and the direction of transfer of the individual data bits over the respectively corresponding bus lines of the two-way data bus. Each block comprises a plurality of internal circuit cards, an internal bus of plural bus lines, of the same predetermined number, respectively connected to plural internal circuit cards of the block, and plural two-way transfer gates respectively associated with and selectively operable for interconnecting the corresponding bus lines of the internal bus and the two-way data bus. A common control means issues external command signals to respective transfer control means of the plural blocks for establishing, selectively, first and second modes of operation of the two-way gate circuits for transferring data in corresponding, opposite directions over respectively corresponding bus lines of the two-way data bus between the two or more different blocks, and a third mode of operation in which data is transferred exclusively over the internal bus of a given block between plural circuit cards of the block.
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Fujitsu Limited
Shaw Dale M.
Shin C.
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