Dynamic random access memory device having static column mode of

Details Dynamic random access memory device having static column mode of Dynamic random access memory device having static column mode of

1992-10-06

1994-03-15

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Including signal clamping

365190, 365203, 365207, 365208, 365229, 3652385, 307530, G11C 1140

Patent

active

052950999

ABSTRACT:
A dynamic random access memory device comprises memory cells arranged in rows and columns and storing data bits, respectively, bit line pairs respectively coupled to every two columns of the memory cells for propagating the data bits read out from the memory cells, word lines respectively coupled to the rows of the memory cells and allowing the data bits stored in one of the rows of the memory cells to be read out to the bit line pairs, sense amplifier circuits provided in association with the bit line pairs and selectively coupling the component bit lines to first and second sources of voltage level depending upon the logic level of the data bits, a pair of data signal lines coupled to an output data buffer circuit, a column selector unit coupled between the bit line pairs and the data signal lines and sequentially interconnecting the bit line pairs and the data signal lines in a static column mode of operation, and a precharging unit coupled to the data signal lines and having current paths from the first source of voltage level to the data signal lines, wherein a limiter is coupled between the first source of voltage level and the data signal lines and prohibits the data signal lines from undesirable low voltage level so that any data bits on the bit line pairs are never destroyed.

REFERENCES:
patent: 4161040 (1979-07-01), Satoh

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