Polysilicon trench and buried wall device structures

Details Polysilicon trench and buried wall device structures Polysilicon trench and buried wall device structures

1997-09-02

1998-04-28

Wallace, Valencia Martin

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257302, 257316, 257330, 257332, 257334, 257398, 257903, 438257, 438265, H01L 27108, H01L 29788, H01L 2976, H01L 2994

Patent

active

057448477

ABSTRACT:
This invention describes a device structure and a method of forming the device structure using trenches with sidewalls formed in the substrate of an integrated circuit. A highly doped polysilicon layer is formed on the walls of the trench or the trench is filled with highly doped polysilicon to form the source and drain of a field effect transistor in an integrated circuit. The invention provides reduced source and drain resistance. The capacitances between the gate and source and the gate and drain are reduced as well.

REFERENCES:
patent: 4520552 (1985-06-01), Arnould et al.
patent: 4835584 (1989-05-01), Lancaster
patent: 4920389 (1990-04-01), Itoh
patent: 4963502 (1990-10-01), Teng et al.
patent: 5100823 (1992-03-01), Yamada
patent: 5111257 (1992-05-01), Andoh et al.
patent: 5204280 (1993-04-01), Dhong et al.
patent: 5278438 (1994-01-01), Kim et al.
patent: 5293512 (1994-03-01), Wen

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