On-chip refresh address generator for dynamic memory

Details On-chip refresh address generator for dynamic memory On-chip refresh address generator for dynamic memory

1980-03-28

1982-08-10

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Data refresh

G11C 700

Patent

active

043441572

ABSTRACT:
A semiconductor device comprises an array of rows and columns of dynamic-type memory cells with on-chip refresh address generator circuitry including an address counter or commutator and a multiplexer to insert the refresh address when a command is received or internally generated indicating a refresh cycle. If a refresh command is not being executed, the device is accessed in the usual manner if a memory address is received.

REFERENCES:
patent: 3729722 (1973-04-01), Shuba
patent: 3930239 (1975-12-01), Salters et al.
patent: 4006468 (1977-02-01), Webster
patent: 4050061 (1977-09-01), Kitagawa
patent: 4207618 (1980-06-01), White et al.

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