High density integrated circuit pad structures

Details High density integrated circuit pad structures High density integrated circuit pad structures

1996-02-13

1998-11-10

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Configuration or pattern of bonds

257774, 257778, H01L 2348, H01L 2352, H01L 2940

Patent

active

058348492

ABSTRACT:
An integrated circuit with high density pad structures is provided. The circuit has circuitry covered by an insulating layer. Pads are formed on the insulating layer overlapping the circuitry. A pattern of holes in the insulating layer allows electrical connections to be formed between the pads and the underlying circuitry. Because the pads are formed on top of the circuitry, the die area occupied by pads is reduced relative to the die area occupied by circuitry. The pads are suitable for flip-chip bonding to a package such as a multichip module or conventional wire bonding.

REFERENCES:
patent: 3795845 (1974-03-01), Cass et al.
"C-4 Solder Chip Connection, Preliminary Data," Technology Products, IBM, Armonk, New York, Jan. 8, 1993.
"Solder Bumping Flow," APTOS Corporation, Milpitas, California (undated).
"Wafer Bumping Service," Brochure of APTOS Corporation, Milpitas. California (undated).

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