Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1996-02-15
1999-01-12
Niebling, John
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438166, 438486, H01L 2100
Patent
active
058588191
DESCRIPTION:
BRIEF SUMMARY
FIELD OF TECHNOLOGY
The present invention is related to the fabrication method for a thin film semiconductor device, the thin film semiconductor device itself, liquid crystal displays, and electronic devices applicable to active matrix liquid crystal displays and the like.
BACKGROUND TECHNOLOGY
In recent years, along with increases in screen size and improvements in resolution, the driving methods for liquid crystal displays (LCDs) are moving from simple matrix methods to active matrix methods; and the displays are becoming capable of displaying large amounts of information. LCDs with more than several hundreds of thousands pixels are possible with active matrix methods which place a switching transistor at each pixel. Transparent insulating substrates such as fused quartz and glass which allow the fabrication of transparent displays are used as substrates for all types of LCDs. Although ordinarily semiconductor layers such as amorphous silicon or polycrystalline silicon are used as the active layer in thin film transistors (TFTs), the use of polycrystalline silicon which has higher operating speeds is advantageous for the case of producing monolithic displays which include integrated driving circuits. When polycrystalline silicon is used as the active layer, fused quartz is used as the substrate; and a so-called "high temperature" process in which the maximum processing temperature exceeds 1000.degree. C. is used to fabricate the TFTs. On the other hand, for the case of an amorphous silicon active layer, a common glass substrate can be used. For increases in LCD display size while maintaining low costs, such use of low-cost common glass substrates is indispensable. Such amorphous silicon layers, however, have such problems as electrical characteristics far inferior to those of polysilicon layers and slow operating speed. Since the high temperature process polysilicon TFTs use quartz substrates, however, there are problems with increasing display size and decreasing costs. Consequently, there is a strong need for technology which can fabricate a thin film semiconductor device employing a semiconductor layer such as polycrystalline silicon as the active layer upon a common glass substrate. But, when using large substrates which are well-suited to mass production, there is a severe restriction in that the substrates must be kept below a maximum processing temperature of about 570.degree. C. in order to avoid deformation of the substrates. In other words, technology which can produce, under such restrictions, the active layer of thin film transistors capable of controlling a liquid crystal display and of thin film transistors which can operate driving circuits at high speed is desired. These devices are currently known as the present low temperature poly-Si TFTs.
Previous low temperature poly-Si TFTs are shown on p. 387 of the SID (Society for Information Display) '93 Digest (1993). According to this description, 50 nm of amorphous silicon (a-Si) is first deposited at 550.degree. C. by LPCVD using monosilane (SiH.sub.4) as the source gas and then converted from a-Si to poly-Si by laser irradiation. After patterning of the poly-Si layer, a gate insulator layer of SiO.sub.2 is deposited by ECR-PECVD at a substrate temperature of 100.degree. C. Following formation of the tantalum (Ta) gate electrode on top of the gate insulator layer, self-aligned transistor source and drain regions are formed in the silicon layer by ion implantation of donor or acceptor impurities while using the gate electrode as a mask. This ion implantation, known as "ion doping", is accomplished by a non-mass separating ion implanter. Hydrogen-diluted phosphine (PH.sub.3), diborane (B.sub.2 H.sub.6) or similar gas is used as a source gas for ion doping. Activation of the impurities is carried out at 300.degree. C. Following deposition of an interlevel insulator layer, electrodes and interconnects such as indium tin oxide (ITO) and aluminum (Al) are deposited to complete the thin film semiconductor device.
As described below, however, th
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Mee Brendan
Niebling John
Seiko Epson Corporation
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