Semiconductor structures for suppressing gate oxide plasma charg

Details Semiconductor structures for suppressing gate oxide plasma charg Semiconductor structures for suppressing gate oxide plasma charg

1998-03-31

2000-01-11

Prenty, Mark V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257356, 257508, 257607, H01L 2976

Patent

active

060139277

ABSTRACT:
Disclosed is a semiconductor diode structure, and method for making semiconductor diode structures for suppressing transistor gate oxide plasma charging damage. The semiconductor diode structure includes a shallow trench isolation region that is configured to isolate an active region of a semiconductor substrate. A doped polysilicon electrode having a first end and a second end. The doped polysilicon electrode is defined in the shallow trench isolation region and the first end is configured to be in electrical contact with the semiconductor substrate. The diode structure further includes a polysilicon gate that has an underlying gate oxide. The polysilicon gate is defined over the active region and extends over part of the shallow trench isolation region so as to make electrical interconnection between the polysilicon gate and the second end of the doped polysilicon electrode.

REFERENCES:
patent: 4543597 (1985-09-01), Shibata
patent: 4689871 (1987-09-01), Malhi
patent: 5844282 (1998-12-01), Noguchi
K.P. Cheung, "Plasma Charging Damage", IEEE 1997 Tutorial Notes, Int'l Reliability Physics Symposium, Apr. 7-10, 1997, pp. 4.1-4.44, Bell Labs/Lucent Technologies, Murray Hill, NJ.

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