Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1998-08-25
1999-11-09
Niebling, John F.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438637, 438738, 438740, 257774, 257775, H01L 214763, H01L 21302, H01L 2348
Patent
active
059813792
ABSTRACT:
A method of forming a via. A substrate having a first conductive layer thereon is provided. An inter-metal dielectric layer is formed over the substrate layer by high density plasma chemical vapor deposition. An etch stop layer is formed on the inter-metal dielectric layer. An oxide layer is formed on the etch stop layer. The oxide layer is defined, so that a shallow opening aligned with the first conductive layer is formed to exposed the inter-metal dielectric layer. The inter-metal dielectric layer is etched away within the shallow opening until the first conductive layer is exposed. The opening is filled with a second conductive layer. The oxide layer is defined by photolithography and etching with a first selectivity, with which the oxide layer has a comparable etching rate to the etch stop layer. The inter-metal dielectric layer is etched with a second selectivity, with which the inter-metal dielectric layer has an etching rate higher than the etch stop layer.
REFERENCES:
patent: 5883436 (1999-03-01), Sadjadi
Berezny Neal
Niebling John F.
United Microelectronics Corp.
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