System for determining the programmed/non programmed status of A

Static information storage and retrieval – Read/write circuit – Differential sensing

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365207, G11C 1300

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058645136

ABSTRACT:
A system for determining the programmed
on-programmed status of a memory cell includes a first branch for connecting a first load and a memory cell matrix and a second branch for connecting a second load and at least one virgin reference memory cell. A circuit for selecting a memory cell of the memory matrix and a circuit for selecting at least one virgin reference cell are included. Each one of the first and second branches has a transistor for enabling a flow of current, respectively, between the first load and the second load and the memory cell matrix and the at least one reference memory cell. The enabling transistors are controlled, respectively, by a first biasing structure and by a second biasing structure. The system includes at least one transistor for redistributing the current of the load on the first branch, which is connected in parallel to the enabling transistor, and a first equalization transistor that is controlled by a precharge signal for the equalization of opposite nodes of the first and second branches. The at least one current redistribution transistor provides a current imbalance in the first load and in the second load in order to sense a difference in conductivity between a memory cell of the memory matrix and the at least one reference cell in order to determine the programmed or non-programmed status of the memory cell of the memory matrix.

REFERENCES:
patent: 5040148 (1991-08-01), Nakai
patent: 5245574 (1993-09-01), Frary et al.
patent: 5305273 (1994-04-01), Jinbo
European Search Report from European Patent Application 96830163.0, filed Mar. 29, 1996.
IEEE International Solid State Circuits Conference, vol. 34, Feb. 1991, New York, US, pp. 264-265 S. Sweha, et al. "A 29ns 8Mb EPROM With Dual Reference-Column ATD Sensing".

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