Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-07-25
1999-01-26
Wallace, Valencia Martin
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257267, 257328, 257329, 257331, 257334, 257339, 438267, 438270, H01L 2976, H01L 2994
Patent
active
058641599
ABSTRACT:
A P.sup.- layer (51) is formed between a P base layer (43) and an N.sup.- layer (42) so as to be in contact with the P base layer (43), facing an insulating film (46) of a trench (45) with the N.sup.- layer (42) between. In the configuration, a depletion layer extends to the P.sup.- layer (51) to relieve an electric field at a tip end portion of the trench (45) and a channel length can be lessened. Therefore, it is possible to provide an insulated gate semiconductor device of high breakdown voltage and low On-resistance.
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patent: 5378911 (1995-01-01), Murakami
patent: 5385853 (1995-01-01), Mohammad
Yilmaz, "Power Metal-Oxide-Semiconductor Field Effect Transistor", World Intellectual Property Organization, PCT, WO 92/14269, Aug. 20, 1992.
IEEE Transactions of Electron Devices, vol. ED-34, No. 11, pp. 2329-2334, Nov. 1987, H.R. Chang, et al., "Self-Aligned UMOSFET's With a Specific On-Resistance of 1 M Omega *CM/SUP 2/".
Martin Wallace Valencia
Mitsubishi Denki & Kabushiki Kaisha
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