Dynamic random access memory

Details Dynamic random access memory Dynamic random access memory

1993-07-02

1995-03-07

LaRoche, Eugene R.

Static information storage and retrieval

Systems using particular element

Capacitors

365187, 365188, 437915, G11C 1124

Patent

active

053964527

ABSTRACT:
A dynamic random access memory. The memory includes a write transistor N3 and a read transistor N2. In a preferred embodiment the write transistor has a threshold level higher than the read transistor. A sense amplifier senses and amplifies a difference in voltage between a bit line and a sense node that is developed when the read transistor permits or does not permit current to flow between ground an a bit line. Associated semiconductor device structures and fabrication techniques are also disclosed.

REFERENCES:
patent: 3593037 (1971-07-01), Hoff, Jr.
patent: 3876991 (1975-04-01), Nelson et al.
patent: 4829018 (1989-04-01), Wahlstrom
patent: 5127739 (1992-07-01), Duvvury et al.
Itoh, "Trends in Megabit DRAM Circuit Design," reprinted from IEEE JSSC, Jun. 1990, pp. 778-789, in Section 3.2: MOS.
"Dynamic RAMS, Paper 3.8," Digital MOS Integrated Circuits II, IEEE Press, New York, N.Y., 1992, pp. 353-363.

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