SRAM cell using a CMOS compatible high gain gated lateral BJT

Details SRAM cell using a CMOS compatible high gain gated lateral BJT SRAM cell using a CMOS compatible high gain gated lateral BJT

1995-04-07

1997-01-14

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Semiconductive

365174, 365182, 257273, 257903, G11C 1134

Patent

active

055946836

ABSTRACT:
This invention presents a new SRAM cell comprising only two MOSFETs: one is the access device for data transfer; and the other is operated as a high gain gated lateral BJT in the reverse base current mode so as to constitute the role of the storage flip-flop or latch. This invention also requires only one-sided peripheral circuitry for Read/Write function. Thus the chip area is greatly saved. In addition, the invention is fully compatible with the existing low-cost, high-yield standard CMOS process.

REFERENCES:
patent: 5060194 (1991-10-01), Sakui et al.
patent: 5422841 (1995-07-01), Nakayama
K. Sakui et al., "A new static memory cell based on reverse base current (RBC) effect of bipolar transistor," IEEE IEDM Tech. Dig., pp. 44-47 Dec. 1988.
T. H. Huang et al., "Base current reversal phenomenon in a CMOS compatible high gain n-p-n gated lateral bipolar transistor," IEEE Trans. Electron Devices, vol. 42, No. 2, pp. 321-327 Feb. 1995.

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