Method of forming multilevel interconnections using high density

Details Method of forming multilevel interconnections using high density Method of forming multilevel interconnections using high density

1995-07-25

1998-03-10

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438688, 438906, H01L 214763

Patent

active

057260974

ABSTRACT:
A method of manufacturing a semiconductor device having multilevel interconnections comprising the steps of forming a lower interconnecting layer on a semiconductor substrate, forming a second interlayer insulation film on the lower interconnecting layer and forming a contact hole so as to expose the surface of the lower interconnecting layer, removing a native oxide film formed to the surface of the lower interconnecting layer by a non-oxidative plasma processing by using a plasma processing device at a plasma density between 1.times.10.sup.11 /cm.sup.3 and 1.times.10.sup.14 /cm.sup.3 while applying a substrate bias voltage of 200 V or higher and lower than 800 V, forming an upper interconnecting layer so as to fill the contact hole after removal of the native oxide film.

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New Contact Process Using Soft Etch for Stable Ohmic Characteristics and Its Application to 0.1 micron CMOS Devices, Dec. 11, 1994, IEDM.
Wolf et al., Silicon Processing For The VLSI Era, vol. I, Lattice Press, 1986, p. 520.

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