Method and system for allocating data among cache memories withi

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area

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Details

711120, 711173, 711141, 711121, 711119, G06F 1208

Patent

active

058931635

ABSTRACT:
A method and system for allocating data among cache memories within a symmetric multiprocessor data-processing system are disclosed. The symmetric multiprocessor data-processing system includes a system memory and multiple processing units, wherein each of the processing units has a cache memory. The system memory is divided into a number of segments, wherein the number of segments is equal to the total number of cache memories. Each of these segments is represented by one of the cache memories such that a cache memory is responsible to cache data from its associated segment within the system memory.

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