Semiconductor memory having amplifier including bipolar transist

Details Semiconductor memory having amplifier including bipolar transist Semiconductor memory having amplifier including bipolar transist

1988-11-28

1989-08-01

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Differential sensing

365190, 36518911, 365177, 3652256, 307530, 307475, G11C 1140, G11C 700

Patent

active

048538990

ABSTRACT:
A semiconductor memory comprises a plurality of first data lines, a plurality of word lines disposed in such a manner as to intersect the first data lines, dynamic memory cells respectively disposed at the intersections between the word lines and the first data lines and including MOS transistors, a second data line connected to the first data lines through a switching circuit, an amplifier circuit connected to the second data line for detecting a read signal, and a write circuit for applying a write signal. The amplifier circuit includes at least one bipolar transistor.

REFERENCES:
patent: 4604533 (1986-08-01), Miyamoto et al.
patent: 4616342 (1986-10-01), Miyamoto
patent: 4665505 (1987-05-01), Miyakawa et al.
patent: 4713796 (1987-12-01), Ogive et al.
Taniguchi et al, "Fully Boosted 64K Dynamic RAM with Automatic and Self-Refresh", IEEE Journal of Solid State Circuits, vol. SC-16, No. 5, Oct. 1981, p. 492+.

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