Semiconductor signal line system with crosstalk reduction

Details Semiconductor signal line system with crosstalk reduction Semiconductor signal line system with crosstalk reduction

1993-11-09

1995-12-12

Lane, Jack A.

Static information storage and retrieval

Read/write circuit

Noise suppression

365 51, 365 63, 365 69, G11C 506, G11C 702

Patent

active

054756430

ABSTRACT:
An improved signal line system for lines such as bit lines for a semiconductor memory is disclosed. In the signal line system, a first pair of signal lines cross each other at at least one point. At least one portion of one of the signal lines of a second pair is disposed between the signal lines of the first pair. At least one portion of one of the signal lines of a third pair is disposed between one of the signal lines of the first pair and the one signal line of the second pair. At least one portion of one of the signal lines of a fourth pair is disposed to a side of the other one of the signal lines of the first pair. At least one portion of one of the signal lines of a fifth pair is disposed to a side of one of the signal lines of the first pair. The level of the crosstalk between the signal lines can be effectively reduced.

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M. Tsukude et al, "A Memory Array Architecture For 16Mb Drams", SDM89-31, 1989, pp. 73-74.

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