MOSFET circuit apparatus with avalanche breakdown prevention mea

Details MOSFET circuit apparatus with avalanche breakdown prevention mea MOSFET circuit apparatus with avalanche breakdown prevention mea

1994-12-02

1996-02-20

Westin, Edward P.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

326 81, 326121, 327534, H03K 1716

Patent

active

054932335

ABSTRACT:
A transistor circuit apparatus comprises a MOS transistor to be improved, for preventing an avalanche breakdown, the MOS transistor being connected in a channel conductor path provided between one of power supply terminals and a terminal of an output, a separate circuit connected to the output terminal and driven by a voltage from a separate power supply, and a pull-down unit including a second transistor connected between one of said power supply terminals and a back gate of the MOS transistor, the second transistor being turned on with an output node of the separate circuit used as power supply when the MOS transistor remains at a ground potential level with no power supply potential supplied, thereby pulling down the potential level of a back gate node of the MOS transistor to the level of one of the power supply terminals.

REFERENCES:
patent: 4506164 (1985-03-01), Higuchi
patent: 4956569 (1990-09-01), Olivio
patent: 4963766 (1990-10-01), Lundberg
patent: 5338978 (1994-09-01), Larsen et al.
patent: 5381056 (1995-01-01), Murphy
patent: 5381061 (1995-01-01), Davis
patent: 5382846 (1995-01-01), Shigehara
patent: 5396128 (1995-03-01), Dunning
Publication, "Physics and Technology of Semiconductor Devices", A. S. Grove (John Wiley and Sons, Inc., 1976, pp. 231-233.

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