Memory device with ferroelectric capacitor

Static information storage and retrieval – Systems using particular element – Ferroelectric

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Details

365149, 365210, 36523006, G11C 1122

Patent

active

060943718

ABSTRACT:
Each ferroelectric memory cell has a ferroelectric capacitor connected between a transfer gate and a plate line, and a coupling capacitor connected between one plate electrode of the ferroelectric capacitor and a common line. For each row in a memory cell array, there are provided an erase switch connected between the common line and an erase potential VE, and another erase switch connected between the plate line and a ground potential, wherein these erase switches are turned on to erase all the memory cells in a lump with activating an erase signal. If an intermediate plate electrode is provided between a pair of the plate electrodes of the ferroelectric capacitor, and connected to the common line, the coupling capacitor can be omitted.

REFERENCES:
patent: 5307304 (1994-04-01), Saito et al.
patent: 5615145 (1997-03-01), Takeuchi et al.
patent: 5898609 (1999-04-01), Yoo

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