Semiconductor memory cell using a ferroelectric thin film and a

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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H01L 2976, H01L 2994, H01L 31062, H01L 31113

Patent

active

060435267

ABSTRACT:
A capacitor structure of a semiconductor memory cell, comprises: a lower electrode formed on an insulation layer; a capacitor insulation film in form of a ferroelectric thin film formed on the lower electrode; and an upper electrode formed on the capacitor insulation layer, the lower electrode including a column-shaped projection made of a conductive material formed on the insulation layer, and a lower electrode layer covering the projection, and the ferroelectric thin film being formed on the lower electrode layer as originally stacked. A method for fabricating a capacitor structure of a semiconductor memory cell, comprises the steps of: forming a conductive material layer on an insulation layer, then patterning the conductive material layer to form a column-shaped projection of a conductive material on the insulation layer; stacking a lower electrode layer on the insulation layer including the surface of the column-shaped projection; stacking a ferroelectric thin film on the lower electrode layer as originally stacked; stacking an upper electrode layer on the ferroelectric thin film; and patterning the lower electrode layer, the ferroelectric thin film and the lower electrode layer to form a capacitor structure including a lower electrode, a capacitor insulation film in form of the ferroelectric thin film, and an upper electrode.

REFERENCES:
patent: 5499207 (1996-03-01), Miki et al.

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